1093 search results - page 146 / 219 » Verifying VLSI Circuits |
GLVLSI
2002
IEEE
14 years 1 months ago
2002
IEEE
This paper develops new techniques for detecting both stuck-open faults and resistive open faults, which result in increased delays along some paths. The improved detection of CMO...
VLSID
2002
IEEE
14 years 1 months ago
2002
IEEE
We propose a timing-oriented logic optimization technique called Generalized De Morgan (GDM) transform, that integrates gate resizing, net buffering and De Morgan transformation. ...
VLSID
2002
IEEE
14 years 1 months ago
2002
IEEE
à This paper addresses the problem of static and dynamic variable voltage scheduling of multi-rate periodic task graphs (i.e., tasks with precedence relationships) and aperiodic t...
DFT
1999
IEEE
14 years 1 months ago
1999
IEEE
A programmable single-chip multiprocessor system for video coding has been developed. The system is implemented in a high-performance 0.25 m logic/embedded DRAM process. It integr...
FCCM
1999
IEEE
14 years 1 months ago
1999
IEEE
This paper presents a method, called multiple constant multiplier trees MCMTs, for producing optimized recon gurable hardware implementations of vector products. An algorithm for ...