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» Verifying VLSI Circuits
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TVLSI
2008
126views more  TVLSI 2008»
13 years 8 months ago
Body Bias Voltage Computations for Process and Temperature Compensation
With continued scaling into the sub-90nm regime, the role of process, voltage and temperature (PVT) variations on the performance of VLSI circuits has become extremely important. T...
Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatneka...
TODAES
2002
134views more  TODAES 2002»
13 years 8 months ago
False-noise analysis using logic implications
ct Cross-coupled noise analysis has become a critical concern in today's VLSI designs. Typically, noise analysis makes an assumption that all aggressing nets can simultaneousl...
Alexey Glebov, Sergey Gavrilov, David Blaauw, Vlad...
DAC
2003
ACM
14 years 9 months ago
Distributed sleep transistor network for power reduction
Sleep transistors are effective to reduce dynamic and leakage power. The cluster-based design was proposed to reduce the sleep transistor area by clustering gates to minimize the ...
Changbo Long, Lei He
ISCAS
2007
IEEE
132views Hardware» more  ISCAS 2007»
14 years 3 months ago
High Read Stability and Low Leakage Cache Memory Cell
- Data in conventional six transistor (6T) static random access memory (SRAM) cells are vulnerable to noise due to the direct access to the data storage nodes through the bit lines...
Zhiyu Liu, Volkan Kursun
ISCAS
2007
IEEE
91views Hardware» more  ISCAS 2007»
14 years 3 months ago
Power Harvesting With PZT Ceramics
—Piezoelectric materials have been proposed as embedded power source, which are capable of converting mechanical energy into electrical energy. However, power generated from a pi...
Hong Chen, Chen Jia, Chun Zhang, Zhihua Wang, Chun...