1093 search results - page 186 / 219 » Verifying VLSI Circuits |
VLSID
2003
IEEE
14 years 9 months ago
2003
IEEE
In this paper, we describe two new algorithms for datapath scheduling which aim at energy reduction while maintaining performance. The proposed algorithms, time constrained and re...
VLSID
2003
IEEE
14 years 9 months ago
2003
IEEE
Abstract-- In battery driven portable applications, the minimization of energy, average power, peak power, and peak power differential are equally important to improve reliability ...
VLSID
2002
IEEE
14 years 9 months ago
2002
IEEE
Predictive delay analysis is presented for a representative CMOS inverter with submicron device size using PREDICTMOS MOSFET model. As against SPICE, which adopts a time consuming...
VLSID
2002
IEEE
14 years 9 months ago
2002
IEEE
IDDQ testing has been used as a test technique to supplement voltage testing of CMOS chips. The idea behind IDDQ testing is to declare a chip as faulty if the steady-state current...
VLSID
2002
IEEE
14 years 9 months ago
2002
IEEE
The improved T and improved n models are proposed for onchip interconnect macromodeling. Using global approximations, simple approximation frames are derived and applied to modeli...