Sciweavers

1093 search results - page 18 / 219
» Verifying VLSI Circuits
Sort
View
ISLPED
1997
ACM
130views Hardware» more  ISLPED 1997»
13 years 11 months ago
K2: an estimator for peak sustainable power of VLSI circuits
New measures of peak power in the context of sequential circuits are proposed. This paper presents an automatic procedure to obtain very good lower bounds on these measures as wel...
Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. P...
ISCAS
2006
IEEE
144views Hardware» more  ISCAS 2006»
14 years 1 months ago
A VLSI spike-driven dynamic synapse which learns only when necessary
— We describe an analog VLSI circuit implementing spike-driven synaptic plasticity, embedded in a network of integrate-and-fire neurons. This biologically inspired synapse is hi...
S. Mitra, Stefano Fusi, Giacomo Indiveri
ISPD
1997
ACM
142views Hardware» more  ISPD 1997»
13 years 11 months ago
Minimization of chip size and power consumption of high-speed VLSI buffers
In this paper, we study optimal bu er design in high-performance VLSI systems. Speci cally, we design a bu er for a given load such that chip area and power dissipation are minima...
D. Zhou, X. Y. Liu
ISCAS
2003
IEEE
153views Hardware» more  ISCAS 2003»
14 years 24 days ago
A VLSI model of range-tuned neurons in the bat echolocation system
The neural computations that support bat echolocation are of great interest to both neuroscientists and engineers, due to the complex and extremely time-constrained nature of the ...
Matthew Cheely, Timothy K. Horiuchi
IJON
2006
165views more  IJON 2006»
13 years 7 months ago
Design and basic blocks of a neuromorphic VLSI analogue vision system
: In this paper we present a complete neuromorphic image processing system and we report the development of an integrated CMOS low-power circuit to test the feasibility of its diff...
Jordi Cosp, Jordi Madrenas, Daniel Fernánde...