1093 search results - page 204 / 219 » Verifying VLSI Circuits |
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
The wire length estimation is the bottleneck of packing based block placers. To cope with this problem, we present a fast wire length estimation method in this paper. The key idea...
DATE
2009
IEEE
2009
IEEE
Analyzing the impact of process variations on parametric measurements: Novel models and applications
14 years 2 months ago
Abstract—In this paper we propose a novel statistical framework to model the impact of process variations on semiconductor circuits through the use of process sensitive test stru...
ISCAS
2007
IEEE
14 years 1 months ago
2007
IEEE
A SoC design for applications of OMA DRM 2 Agent in mobile phones is presented in this paper, which has been verified by Altera Stratix EP1S80B956C6 FPGA development board. Several...
IPPS
2005
IEEE
14 years 1 months ago
2005
IEEE
Modern internet and telephone switches consist of numerous VLSI-circuits operating at high frequencies to handle high bandwidths. It is beyond question that such systems must cont...
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
Abstract— This paper presents and evaluates a hybrid implementation of a low complexity algorithm for speech enhancement, the Adaptive Gain Equalizer (AGE). The AGE is a subband ...