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» Verifying VLSI Circuits
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ICCSA
2005
Springer
14 years 2 months ago
A Parallel Tabu Search Algorithm for Optimizing Multiobjective VLSI Placement
Abstract. In this paper, we present a parallel tabu search (TS) algorithm for efficient optimization of a constrained multiobjective VLSI standard cell placement problem. The prima...
Mahmood R. Minhas, Sadiq M. Sait
ASPDAC
1999
ACM
149views Hardware» more  ASPDAC 1999»
14 years 1 months ago
The Hierarchical h-Adaptive 3-D Boundary Element Computation of VLSI Interconnect Capacitance
: In VLSI circuits with deep sub-micron, the parasitic capacitance from interconnect is a very important factor determining circuit performances such as power and time-delay. The B...
Jinsong Hou, Zeyi Wang, Xianlong Hong
POPL
2007
ACM
14 years 9 months ago
Geometry of synthesis: a structured approach to VLSI design
We propose a new technique for hardware synthesis from higherorder functional languages with imperative features based on Reynolds's Syntactic Control of Interference. The re...
Dan R. Ghica
ICCAD
2005
IEEE
110views Hardware» more  ICCAD 2005»
14 years 5 months ago
Performance analysis of carbon nanotube interconnects for VLSI applications
The work in this paper analyses the applicability of carbon nanotube (CNT) bundles as interconnects for VLSI circuits, while taking into account the practical limitations in this ...
Navin Srivastava, Kaustav Banerjee
ICRA
2000
IEEE
106views Robotics» more  ICRA 2000»
14 years 1 months ago
Toward Biomorphic Control Using Custom aVLSI CPG Chips
The locomotor controller for walking, running, swimming, and flying animals is based on a Central Pattern Generator (CPG). Models of CPGs as systems of coupled non-linear oscillato...
M. Anthony Lewis, Ralph Etienne-Cummings, Avis H. ...