Sciweavers

1093 search results - page 41 / 219
» Verifying VLSI Circuits
Sort
View
GLVLSI
2009
IEEE
201views VLSI» more  GLVLSI 2009»
14 years 6 hour ago
Glitch-free design for multi-threshold CMOS NCL circuits
In this paper, a novel design is proposed for eliminating glitches and signal bounces during wake-up events that result from incorporating multi-threshold CMOS (MTCMOS) into async...
Ahmad Al Zahrani, Andrew Bailey, Guoyuan Fu, Jia D...
ASPDAC
2006
ACM
106views Hardware» more  ASPDAC 2006»
14 years 2 months ago
Calculating frequency-dependent inductance of VLSI interconnect by complete multiple reciprocity boundary element method
— A complete multiple reciprocity method (CMRM), usually for the eigenvalue analysis of Helmholtz equation, is introduced to the BEM for frequency-dependent inductance extraction...
Changhao Yan, Wenjian Yu, Zeyi Wang
GLVLSI
2000
IEEE
145views VLSI» more  GLVLSI 2000»
14 years 1 months ago
Manhattan or non-Manhattan?: a study of alternative VLSI routing architectures
Circuit interconnect has become a substantial obstacle in the design of high performance systems. In this paper we explore a new routing paradigm that strikes at the root of the i...
Cheng-Kok Koh, Patrick H. Madden
ISCAS
2007
IEEE
93views Hardware» more  ISCAS 2007»
14 years 3 months ago
VLSI Implementation of a Lattice-Reduction Algorithm for Multi-Antenna Broadcast Precoding
Abstract— This paper describes the first VLSI implementation of lattice reduction (LR) aided multi-antenna broadcast precoding with vector perturbation. The considered LR scheme...
Andreas Burg, Dominik Seethaler, Gerald Matz
NIPS
2004
13 years 10 months ago
On-Chip Compensation of Device-Mismatch Effects in Analog VLSI Neural Networks
Device mismatch in VLSI degrades the accuracy of analog arithmetic circuits and lowers the learning performance of large-scale neural networks implemented in this technology. We s...
Miguel Figueroa, Seth Bridges, Chris Diorio