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» Verifying VLSI Circuits
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DFT
1997
IEEE
93views VLSI» more  DFT 1997»
14 years 1 months ago
An IDDQ Sensor for Concurrent Timing Error Detection
Abstract— Error control is a major concern in many computer systems, particularly those deployed in critical applications. Experience shows that most malfunctions during system o...
Christopher G. Knight, Adit D. Singh, Victor P. Ne...
DAC
2009
ACM
14 years 3 months ago
Information hiding for trusted system design
For a computing system to be trusted, it is equally important to verify that the system performs no more and no less functionalities than desired. Traditional testing and verifica...
Junjun Gu, Gang Qu, Qiang Zhou
ISPD
2003
ACM
105views Hardware» more  ISPD 2003»
14 years 2 months ago
Partition-driven standard cell thermal placement
The thermal problem has been emerged as one of the key issues for next-generation IC design. In this paper, we propose a scheme to achieve better thermal distribution for partitio...
Guoqiang Chen, Sachin S. Sapatnekar
GLVLSI
2010
IEEE
138views VLSI» more  GLVLSI 2010»
14 years 1 months ago
Methodology to achieve higher tolerance to delay variations in synchronous circuits
A methodology is proposed for designing robust circuits exhibiting higher tolerance to process and environmental variations. This higher tolerance is achieved by exploiting the in...
Emre Salman, Eby G. Friedman
GLVLSI
1999
IEEE
59views VLSI» more  GLVLSI 1999»
14 years 1 months ago
Resonant Tunneling Technology for Mixed Signal and Digital Circuits in the 10-100 GHz Domain
The inherent bistability and picosecond time-scale switching of the resonant tunneling diode (RTD) provides an ideal element for the design of digital circuits and analog signal q...
T. P. E. Broekaert, B. Brar, F. Morris, A. C. Seab...