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search results - page 4 / 219
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Verifying VLSI Circuits
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GLVLSI
2007
IEEE
154
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Analyzing and modeling process balance for sub-threshold circuit design
14 years 1 months ago
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Joseph F. Ryan, Jiajing Wang, Benton H. Calhoun
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GLVLSI
2003
IEEE
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MuTaTe: an efficient design for testability technique for multiplexor based circuits
14 years 23 days ago
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Rolf Drechsler, Junhao Shi, Görschwin Fey
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GLVLSI
2003
IEEE
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Repeater and current-sensing hybrid circuits for on-chip interconnects
14 years 23 days ago
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Atul Maheshwari, Wayne Burleson
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GLVLSI
1999
IEEE
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Advances Toward Molecular-Scale Electronic Digital Logic Circuits: A Review and Prospectus
13 years 11 months ago
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James C. Ellenbogen
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GLVLSI
1999
IEEE
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A Novel High-Speed Flip-Flop Circuit Using RTDs and HEMTs
13 years 11 months ago
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Hideaki Matsuzaki, Toshihiro Itoh, Masafumi Yamamo...
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