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» Verifying VLSI Circuits
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ICCAD
1997
IEEE
131views Hardware» more  ICCAD 1997»
14 years 2 months ago
COSMOS: a continuous optimization approach for maximum power estimation of CMOS circuits
Maximum instantaneous power in VLSI circuits has a great impact on circuit's reliability and the design of power and ground lines. To synthesizehighlyreliablesystems,accurate...
Chuan-Yu Wang, Kaushik Roy
DFT
2008
IEEE
89views VLSI» more  DFT 2008»
14 years 4 months ago
Fabrication Variations and Defect Tolerance for Nanomagnet-Based QCA
Tolerating defects and fabrication variations will be critical in any system made with devices that have nanometer feature sizes. This paper considers how fabrication variations a...
Michael T. Niemier, Michael Crocker, Xiaobo Sharon...
ISVLSI
2007
IEEE
107views VLSI» more  ISVLSI 2007»
14 years 4 months ago
A Quantum Algorithm for Finding Minimum Exclusive-Or Expressions
This paper presents a quantum algorithm for finding minimal ESCT (Exclusive-or Sum of Complex Terms) or ESOP (Exclusiveor Sum Of Products) expressions for any arbitrary incomplet...
Marinos Sampson, Dimitrios Voudouris, George K. Pa...
DFT
2005
IEEE
200views VLSI» more  DFT 2005»
14 years 3 months ago
Data Dependent Jitter (DDJ) Characterization Methodology
A new jitter model is developed using Matlab and Spice to analyze Data Dependent Jitter (DDJ) in serial data integrated circuits. The simulation results show that DDJ is dependent...
Kyung Ki Kim, Yong-Bin Kim, Fabrizio Lombardi
DATE
2004
IEEE
82views Hardware» more  DATE 2004»
14 years 1 months ago
Managing Don't Cares in Boolean Satisfiability
Advances in Boolean satisfiability solvers have popularized their use in many of today's CAD VLSI challenges. Existing satisfiability solvers operate on a circuit representat...
Sean Safarpour, Andreas G. Veneris, Rolf Drechsler...