Sciweavers

1093 search results - page 89 / 219
» Verifying VLSI Circuits
Sort
View
GLVLSI
2002
IEEE
135views VLSI» more  GLVLSI 2002»
14 years 3 months ago
Low swing dual threshold voltage domino logic
A low swing domino logic technique is proposed to decrease power consumption without sacrificing noise immunity. With the proposed low swing domino logic circuit technique, active...
Volkan Kursun, Eby G. Friedman
ARVLSI
1995
IEEE
220views VLSI» more  ARVLSI 1995»
14 years 1 months ago
Optimization of combinational and sequential logic circuits for low power using precomputation
Precomputation is a recently proposed logic optimization technique which selectively disables the inputs of a sequential logic circuit, thereby reducing switching activity and pow...
José Monteiro, John Rinderknecht, Srinivas ...
GLVLSI
2007
IEEE
194views VLSI» more  GLVLSI 2007»
14 years 1 months ago
Probabilistic maximum error modeling for unreliable logic circuits
Reliability modeling and evaluation is expected to be one of the major issues in emerging nano-devices and beyond 22nm CMOS. Such devices would have inherent propensity for gate f...
Karthikeyan Lingasubramanian, Sanjukta Bhanja
ISCAS
2011
IEEE
278views Hardware» more  ISCAS 2011»
13 years 1 months ago
A programmable axonal propagation delay circuit for time-delay spiking neural networks
— we present an implementation of a programmable axonal propagation delay circuit which uses one first-order logdomain low-pass filter. Delays may be programmed in the 550ms rang...
Runchun Wang, Craig T. Jin, Alistair McEwan, Andr&...
VLSID
1999
IEEE
87views VLSI» more  VLSID 1999»
14 years 2 months ago
Digital Circuit Design for Minimum Transient Energy and a Linear Programming Method
This paper provides a theoretical basis for eliminating or reducing the energy consumption due to transients in a synchronous digital circuit. The transient energy is minimized wh...
Vishwani D. Agrawal, Michael L. Bushnell, Ganapath...