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» Verifying an Arbiter Circuit
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STOC
2007
ACM
102views Algorithms» more  STOC 2007»
14 years 8 months ago
Zero-knowledge from secure multiparty computation
A zero-knowledge proof allows a prover to convince a verifier of an assertion without revealing any further information beyond the fact that the assertion is true. Secure multipar...
Yuval Ishai, Eyal Kushilevitz, Rafail Ostrovsky, A...
TC
1998
13 years 7 months ago
Abstraction Techniques for Validation Coverage Analysis and Test Generation
ion Techniques for Validation Coverage Analysis and Test Generation Dinos Moundanos, Jacob A. Abraham, Fellow, IEEE, and Yatin V. Hoskote —The enormous state spaces which must be...
Dinos Moundanos, Jacob A. Abraham, Yatin Vasant Ho...
ICIP
2006
IEEE
14 years 9 months ago
Hardware Computation of Moment Functions in a Silicon Retina using Binary Patterns
We present in this paper a method for implementing moment functions in a CMOS retina for shape recognition applications. The method is based on the use of binary patterns and it a...
Olivier Aubreton, Lew Fock Chong Lew Yan Voon, Guy...
FPGA
2004
ACM
137views FPGA» more  FPGA 2004»
14 years 1 months ago
Making visible the thermal behaviour of embedded microprocessors on FPGAs: a progress report
This paper shows a method to verifying the thermal status of complex FPGA-based circuits like microprocessors. Thus, the designer can evaluate if a particular block is working bey...
Sergio López-Buedo, Eduardo I. Boemo
ICCAD
1994
IEEE
95views Hardware» more  ICCAD 1994»
14 years 2 days ago
Provably correct high-level timing analysis without path sensitization
- This paper addresses the problem of true delay estimation during high level design. The existing delay estimation techniques either estimate the topological delay of the circuit ...
Subhrajit Bhattacharya, Sujit Dey, Franc Brglez