222 search results - page 29 / 45 » Verifying an Arbiter Circuit |
ICCAD
1996
IEEE
14 years 4 days ago
1996
IEEE
We presenta new representationfor Boolean functions called PartitionedROBDDs. In this representation we divide the Boolean space into `k' partitions and represent a function ...
GLVLSI
2007
IEEE
13 years 12 months ago
2007
IEEE
This paper describes a formal verification methodology of highnthesis (HLS) process. The abstraction level of the input to HLS is so high compared to that of the output that the v...
FDTC
2006
Springer
13 years 11 months ago
2006
Springer
Abstract. Balanced gates are an effective countermeasure against power analysis attacks only if they can be guaranteed to maintain their power balance. Traditional testing and reli...
TVLSI
2008
13 years 7 months ago
2008
Data stability of SRAM cells has become an important issue with the scaling of CMOS technology. Memory banks are also important sources of leakage since the majority of transistors...
ET
2010
13 years 6 months ago
2010
Abstract As technology scales down into the nanometer era, delay testing of modern chips has become more and more important. Tests for the path delay fault model are widely used to...