MONSOON: SAT-Based ATPG for Path Delay Faults Using Multiple-Valued Logics

Abstract As technology scales down into the nanometer era, delay testing of modern chips has become more and more important. Tests for the path delay fault model are widely used to detect small delay defects and to verify the correct temporal behavior of a circuit. In this article, MONSOON, an efficient SAT-based approach for generating non-robust and robust test patterns for path delay faults is presented. MONSOON handles tri-state elements and environmental constraints occurring in industrial practice using multiple-valued logics. Structural techniques increase the efficiency of the algorithm. A comparison with a state-of-the-art approach shows a significant speed-up. Experimental results for large industrial circuits demonstrates the feasibility and robustness of MONSOON. Keywords SAT · Delay testing · ATPG · Path delay faults · Multiple-valued logics

• Type: Journal
• Year: 2010
• Where: ET
• Authors: Stephan Eggersglüß, Görschwin Fey, Andreas Glowatz, Friedrich Hapke, Jürgen Schlöffel, Rolf Drechsler
• Keywords: Delay Fault Model, ET 2010, Multiple-valued Logics, Path Delay Faults