487 search results - page 4 / 98 » Versatile Imaging Architecture Based on a System on Chip |
DDECS
2008
IEEE
13 years 11 months ago
2008
IEEE
The paper introduces a cryptographic System on a Chip (SoC) implementation based on recent Actel nonvolatile FPGA Fusion chip with embedded ARM7 soft-core processor. The SoC is bui...
ARC
2008
Springer
13 years 11 months ago
2008
Springer
Abstract. This paper presents a real time parallel hardware architecture for image feature detection based on the SIFT (Scale Invariant Feature Transform) algorithm. This architect...
VLSID
2002
IEEE
14 years 10 months ago
2002
IEEE
IDDQ testing has been used as a test technique to supplement voltage testing of CMOS chips. The idea behind IDDQ testing is to declare a chip as faulty if the steady-state current...
SBCCI
2003
ACM
14 years 3 months ago
2003
ACM
Network on Chip (NoC) is a new paradigm for designing core based System on Chips. It supports high degree of reusability and is scalable. In this paper, an efficient Two-Step Gene...
ICETET
2009
IEEE
14 years 4 months ago
2009
IEEE
Abstract— Design of Network on chip architectures for multimedia applications is being widely studied. This involves design decisions at various levels of hierarchy. Topology des...