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ISCA
2007
IEEE
130views Hardware» more  ISCA 2007»
13 years 8 months ago
Non-Inclusion Property in Multi-Level Caches Revisited
The center of gravity of computer architecture is moving toward memory systems. Barring breakthrough microarchitectural techniques to move processor performance to higher levels, ...
Mohamed M. Zahran, Kursad Albayraktaroglu, Manoj F...
TVLSI
2008
139views more  TVLSI 2008»
13 years 8 months ago
Ternary CAM Power and Delay Model: Extensions and Uses
Applications in computer networks often require high throughput access to large data structures for lookup and classification. While advanced algorithms exist to speed these search...
Banit Agrawal, Timothy Sherwood
VLSID
2002
IEEE
116views VLSI» more  VLSID 2002»
14 years 9 months ago
Prioritized Prime Implicant Patterns Puzzle for Novel Logic Synthesis and Optimization
Compare CMOS Logic with Pass-Transistor Logic, a question was raised in our mind: "Does any rule exist that contains all good?" This paper reveals novel logic synthesis ...
Kuo-Hsing Cheng, Shun-Wen Cheng
WSC
1998
13 years 10 months ago
SEAMS: Simulation Environment for VHDL-AMS
VHDL-AMS is an Analog and Mixed-Signal extension to the Very High Speed Integrated Circuit Hardware Description Language (VHDL). With the standardization of VHDL-AMS, capable and ...
Peter Frey, Kathiresan Nellayappan, Vasudevan Sahn...
TROB
2010
115views more  TROB 2010»
13 years 3 months ago
A Variable Stiffness PZT Actuator Having Tunable Resonant Frequencies
A new approach to a variable stiffness actuator with tunable resonant frequencies is presented in this paper. Variable stiffness actuators have become increasingly important for m...
Thomas W. Secord, H. Harry Asada