Sciweavers

1508 search results - page 254 / 302
» Versatile Processor Design for Efficiency and High Performan...
Sort
View
VLSID
2007
IEEE
206views VLSI» more  VLSID 2007»
14 years 9 months ago
MAX: A Multi Objective Memory Architecture eXploration Framework for Embedded Systems-on-Chip
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...
ASPDAC
2006
ACM
157views Hardware» more  ASPDAC 2006»
14 years 2 months ago
Delay modeling and static timing analysis for MTCMOS circuits
- One of the critical issues in MTCMOS design is how to estimate a circuit delay quickly. In this paper, we propose a delay modeling and static timing analysis (STA) methodology ta...
Naoaki Ohkubo, Kimiyoshi Usami
RV
2009
Springer
155views Hardware» more  RV 2009»
14 years 1 months ago
Hardware Supported Flexible Monitoring: Early Results
Monitoring of software’s execution is crucial in numerous software development tasks. Current monitoring efforts generally require extensive instrumentation of the software or d...
Antonia Zhai, Guojin He, Mats Per Erik Heimdahl
SIGMOD
2007
ACM
128views Database» more  SIGMOD 2007»
14 years 9 months ago
A SQL: 1999 code generator for the pathfinder xquery compiler
The Pathfinder XQuery compiler has been enhanced by a new code generator that can target any SQL:1999-compliant relational database system (RDBMS). This code generator marks an im...
Torsten Grust, Manuel Mayr, Jan Rittinger, Sherif ...
CASES
2005
ACM
13 years 11 months ago
A post-compilation register reassignment technique for improving hamming distance code compression
Code compression is a field where compression ratios between compiler-generated code and subsequent compressed code are highly dependent on decisions made at compile time. Most op...
Montserrat Ros, Peter Sutton