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TC
1998
13 years 9 months ago
Methodologies for Tolerating Cell and Interconnect Faults in FPGAs
—The very high levels of integration and submicron device sizes used in current and emerging VLSI technologies for FPGAs lead to higher occurrences of defects and operational fau...
Fran Hanchek, Shantanu Dutt
MT
2007
158views more  MT 2007»
13 years 9 months ago
Automatic extraction of translations from web-based bilingual materials
This paper describes the framework of the StatCan Daily Translation Extraction System (SDTES), a computer system that maps and compares webbased translation texts of Statistics Can...
Qibo Zhu, Diana Zaiu Inkpen, Ash Asudeh
TALG
2010
86views more  TALG 2010»
13 years 8 months ago
Approximating corridors and tours via restriction and relaxation techniques
Given a rectangular boundary partitioned into rectangles, the Minimum-Length Corridor (MLC-R) problem consists of finding a corridor of least total length. A corridor is a set of ...
Arturo Gonzalez-Gutierrez, Teofilo F. Gonzalez
JSAC
2010
132views more  JSAC 2010»
13 years 4 months ago
Very Efficient Balanced Codes
The prior art construction of sets of balanced codewords by Knuth is attractive for its simplicity and absence of look-up tables, but the redundancy of the balanced codes generated...
K. Schouhamer Immink, J. Weber
TREC
2003
13 years 11 months ago
Report on the TREC 2003 Experiment: Genomic Track
After retrieval, this simple strategy yield to an important improvement of the average precision: from 17.02 up to 35.80. Task II. Our approach is based on argumentative structurin...
Patrick Ruch, Gilles Cohen, Frédéric...