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ICCAD
1997
IEEE
97views Hardware» more  ICCAD 1997»
13 years 12 months ago
Low power logic synthesis for XOR based circuits
An abundance of research e orts in low power logic synthesis have so far been focused on and or or nand nor based logic. A typical approach is to rst generate an initial multi-lev...
Unni Narayanan, C. L. Liu
CSREAESA
2006
13 years 9 months ago
Java Flowpaths: Efficiently Generating Circuits for Embedded Systems from Java
The performance of software executed on a microprocessor is adversely affected by the basic fetchexecute cycle. A further performance penalty results from the load-execute-store p...
Darrin M. Hanna, Michael DuChene, Girma S. Tewolde...
GECCO
2008
Springer
111views Optimization» more  GECCO 2008»
13 years 8 months ago
Single-objective front optimization: application to rf circuit design
This paper proposes a new algorithm which promotes well distributed non-dominated fronts in the parameters space when a single-objective function is optimized. This algorithm is b...
Eduardo José Solteiro Pires, Luís Me...
DT
2002
67views more  DT 2002»
13 years 7 months ago
A Retargetable Embedded In-Circuit Emulation Module for Microprocessors
This article presents an in-circuit emulation (ICE) module that can be embedded with a microprocessr core. The ICE module, based on the IEEE 1149.1 JTAG architecture, supports typ...
Ing-Jer Huang, Chung-Fu Kao, Hsin-Ming Chen, Ching...
CTRSA
2005
Springer
88views Cryptology» more  CTRSA 2005»
14 years 1 months ago
Side-Channel Leakage of Masked CMOS Gates
There are many articles and patents on the masking of logic gates. However, the existing publications assume that a masked logic gate switches its output no more than once per cloc...
Stefan Mangard, Thomas Popp, Berndt M. Gammel