This article starts with a discussion of three different attacks on masked AES hardware implementations. This discussion leads to the conclusion that glitches in masked circuits po...
This paper examines architectural techniques for providing concurrent error detection in self-timed VLSI pipelines. Signal pairs from Differential Cascode Voltage Switch Logic are...
In this work we study some properties associated with the bordercollision bifurcations in a two-dimensional piecewise linear map in canonical form, related to the case in which a ...
In this paper, we evaluate the capacity of voice over internet protocol (VoIP) services over high-speed downlink packet access (HSDPA), in which frame-bundling (FB) is incorporated...