425 search results - page 17 / 85 » Virtual private caches |
TC
2011
13 years 2 months ago
2011
—Aggressive technology scaling to 45nm and below introduces serious reliability challenges to the design of microprocessors. Since a large fraction of chip area is devoted to on-...
HIPEAC
2007
Springer
14 years 1 months ago
2007
Springer
Abstract. The interest in translation-based virtual execution environments (VEEs) is growing with the recognition of their importance in a variety of applications. However, due to ...
HPCA
2005
IEEE
14 years 7 months ago
2005
IEEE
The use of large instruction windows coupled with aggressive out-oforder and prefetching capabilities has provided significant improvements in processor performance. In this paper...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
With the advent of chip-multiprocessors (CMPs), Thread-Level Speculation (TLS) remains a promising technique for exploiting this highly multithreaded hardware to improve the perfo...
DSD
2003
IEEE
14 years 24 days ago
2003
IEEE
With shrinking feature size of silicon fabrication technology, architects are putting more and more logic into a single die. While one might opt to use these transistors for build...