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PATMOS
2004
Springer
14 years 1 months ago
Low Latency Synchronization Through Speculation
Synchronization between independently clocked regions in a high performance system is often subject to latencies of more than one clock cycle. We show how the latency can be reduce...
D. J. Kinniment, Alexandre Yakovlev
ICMCS
2007
IEEE
158views Multimedia» more  ICMCS 2007»
14 years 1 months ago
Content-Aware P2P Video Streaming with Low Latency
This paper describes the Stanford P2P Multicast (SPPM) streaming system that employs an overlay architecture specifically designed for low delay video applications. In order to p...
Pierpaolo Baccichet, Jeonghun Noh, Eric Setton, Be...
HOTI
2005
IEEE
14 years 1 months ago
Control Path Implementation for a Low-Latency Optical HPC Switch
— A crucial part of any high-performance computing system is its interconnection network. In the OSMOSIS project, Corning and IBM are jointly developing a demonstrator interconne...
Cyriel Minkenberg, François Abel, Peter M&u...
SIGGRAPH
1999
ACM
13 years 12 months ago
A Real-Time Low-Latency Hardware Light-Field Renderer
This paper describes the design and implementation of an architecture for interactively viewing static light fields with very low latency. The system was deliberately over enginee...
Matthew J. P. Regan, Gavin S. P. Miller, Steven M....
VLSID
1993
IEEE
234views VLSI» more  VLSID 1993»
13 years 11 months ago
NPCPL: Normal Process Complementary Pass Transistor Logic for Low Latency, High Throughput Designs
High throughput and low latency designs are required in modern high performance systems, especially for signal processing applications. Existing logic families cannot provide both...
Debabrata Ghosh, S. K. Nandy, K. Parthasarathy, V....