26 search results - page 1 / 6 » Voltage island aware floorplanning for power and timing opti... |
147
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ICCAD
2006
IEEE
16 years 2 months ago
2006
IEEE
Power consumption is a crucial concern in nanometer chip design. Researchers have shown that multiple supply voltage (MSV) is an effective method for power consumption reduction....
137
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ISVLSI
2006
IEEE
15 years 11 months ago
2006
IEEE
— Based on the proposed reliability characterization model, reliability-bounded low-power design as a methodology to balance reliability enhancement and power reduction in chip d...
143
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ASPDAC
2007
ACM
15 years 9 months ago
2007
ACM
Using multiple supply voltages on a SoC design is an efficient way to achieve low power. However, it may lead to a complex power network and a huge number of level shifters if we j...
152
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ICCAD
2007
IEEE
16 years 2 months ago
2007
IEEE
— Energy efficiency has become one of the most important issues to be addressed in today’s System-on-a-Chip (SoC) designs. One way to lower the power consumption is to reduce ...
130
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ICCD
2005
IEEE
16 years 2 months ago
2005
IEEE
As technology scales, power consumption and thermal effects have become challenges for system-on-chip designers. The rising on-chip temperatures can have negative impacts on SoC p...