26 search results - page 1 / 6 » Voltage island aware floorplanning for power and timing opti... |
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
Power consumption is a crucial concern in nanometer chip design. Researchers have shown that multiple supply voltage (MSV) is an effective method for power consumption reduction....
ISVLSI
2006
IEEE
14 years 1 months ago
2006
IEEE
— Based on the proposed reliability characterization model, reliability-bounded low-power design as a methodology to balance reliability enhancement and power reduction in chip d...
ASPDAC
2007
ACM
13 years 11 months ago
2007
ACM
Using multiple supply voltages on a SoC design is an efficient way to achieve low power. However, it may lead to a complex power network and a huge number of level shifters if we j...
ICCAD
2007
IEEE
14 years 4 months ago
2007
IEEE
— Energy efficiency has become one of the most important issues to be addressed in today’s System-on-a-Chip (SoC) designs. One way to lower the power consumption is to reduce ...
ICCD
2005
IEEE
14 years 4 months ago
2005
IEEE
As technology scales, power consumption and thermal effects have become challenges for system-on-chip designers. The rising on-chip temperatures can have negative impacts on SoC p...