149 search results - page 28 / 30 » Voltage scheduling problem for dynamically variable voltage ... |
CASES
2005
ACM
13 years 10 months ago
2005
ACM
In Simultaneous Multithreaded (SMT) architectures most hardware resources are shared between threads. This provides a good cost/performance trade-off which renders these architec...
HPCA
2009
IEEE
14 years 3 months ago
2009
IEEE
As transistor process technology approaches the nanometer scale, process variation significantly affects the design and optimization of high performance microprocessors. Prior stu...
DAC
2006
ACM
14 years 9 months ago
2006
ACM
Most existing dynamic voltage scaling (DVS) schemes for multiple tasks assume an energy cost function (energy consumption versus execution time) that is independent of the task ch...
ICCAD
2009
IEEE
13 years 6 months ago
2009
IEEE
Multi-core processors have become an integral part of mainstream high performance computer systems. In parallel, exponentially increasing power density and packaging costs have ne...
ICPP
2008
IEEE
14 years 3 months ago
2008
IEEE
The issue queue (IQ) is a key microarchitecture structure for exploiting instruction-level and thread-level parallelism in dynamically scheduled simultaneous multithreaded (SMT) p...