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ISVLSI
2006
IEEE
150views VLSI» more  ISVLSI 2006»
14 years 1 months ago
Design and Analysis of a Low Power VLIW DSP Core
Power consumption has been the primary issue in processor design, with various power reduction strategies being adopted from system-level to circuitlevel. In order to develop a po...
Chan-Hao Chang, Diana Marculescu
CORR
2010
Springer
122views Education» more  CORR 2010»
13 years 7 months ago
Optimum Power and Rate Allocation for Coded V-BLAST: Average Optimization
An analytical framework for performance analysis and optimization of coded V-BLAST is developed. Average power and/or rate allocations to minimize the outage probability as well as...
Victoria Kostina, Sergey Loyka
DAC
2005
ACM
13 years 9 months ago
Power grid simulation via efficient sampling-based sensitivity analysis and hierarchical symbolic relaxation
On-chip supply networks are playing an increasingly important role for modern nanometer-scale designs. However, the ever growing sizes of power grids make the analysis problem ext...
Peng Li
ICNC
2005
Springer
14 years 26 days ago
A Multi-cluster Grid Enabled Evolution Framework for Aerodynamic Airfoil Design Optimization
Advances in grid computing have recently sparkled the research and development of Grid problem solving environments for complex design. Parallelism in the form of distributed compu...
Hee-Khiang Ng, Dudy Lim, Yew-Soon Ong, Bu-Sung Lee...
ICCD
2006
IEEE
118views Hardware» more  ICCD 2006»
14 years 4 months ago
A System-level Network-on-Chip Simulation Framework Integrated with Low-level Analytical Models
—This paper presents a system-level Network-on-Chip modeling framework that integrates transaction-level model and analytical wire model for design space exploration. It enables ...
Jinwen Xi, Peixin Zhong