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ISLPED
1999
ACM
90views Hardware» more  ISLPED 1999»
13 years 11 months ago
Way-predicting set-associative cache for high performance and low energy consumption
This paper proposes a new approach using way prediction for achieving high performance and low energy consumption of set-associative caches. By accessing only a single cache way p...
Koji Inoue, Tohru Ishihara, Kazuaki Murakami
DAC
1999
ACM
14 years 8 months ago
Memory Exploration for Low Power, Embedded Systems
In embedded system design, the designer has to choose an onchip memory configuration that is suitable for a specific application. To aid in this design choice, we present a memory...
Wen-Tsong Shiue, Chaitali Chakrabarti
ICCD
2004
IEEE
111views Hardware» more  ICCD 2004»
14 years 4 months ago
Power-Aware Deterministic Block Allocation for Low-Power Way-Selective Cache Structure
This paper proposes a power-aware cache block allocation algorithm for the way-selective setassociative cache on embedded systems to reduce energy consumption without additional d...
Jung-Wook Park, Gi-Ho Park, Sung-Bae Park, Shin-Du...
WINET
2011
13 years 2 months ago
High performance, low complexity cooperative caching for wireless sensor networks
During the last decade, Wireless Sensor Networks (WSNs) have emerged and matured at such point that currently support several applications like environment control, intelligent bu...
Nikos Dimokas, Dimitrios Katsaros, Leandros Tassiu...
ICCD
2004
IEEE
114views Hardware» more  ICCD 2004»
14 years 4 months ago
Low Energy, Highly-Associative Cache Design for Embedded Processors
Many embedded processors use highly associative data caches implemented using a CAM-based tag search. When high-associativity is desirable, CAM designs can offer performance advan...
Alexander V. Veidenbaum, Dan Nicolaescu