254 search results - page 12 / 51 » Weaving Relations for Cache Performance |
ISCA
2000
IEEE
14 years 1 months ago
2000
IEEE
Trace caches enable high bandwidth, low latency instruction supply, but have a high miss penalty and relatively large working sets. Consequently, their performance may suffer due ...
MDA
1999
Springer
14 years 1 months ago
1999
Springer
Abstract. Caching frequently accessed data at the client is an attractive technique for improving access time. In a mobile computing environment, client location becomes a piece of...
IEEEPACT
1999
IEEE
14 years 1 months ago
1999
IEEE
Trace cache, an instruction fetch technique that reduces taken branch penalties by storing and fetching program instructions in dynamic execution order, dramatically improves inst...
COMPUTER
2000
13 years 8 months ago
2000
Processor and memory technology trends portend a continual increase in the relative cost of accessing main memory. Machine designers have tried to mitigate the effect of this tren...
ISCA
2000
IEEE
14 years 1 months ago
2000
IEEE
As DRAM access latencies approach a thousand instructionexecution times and on-chip caches grow to multiple megabytes, it is not clear that conventional cache structures continue ...