254 search results - page 13 / 51 » Weaving Relations for Cache Performance |
EUROSYS
2011
ACM
13 years 6 days ago
2011
ACM
Buffer caches in operating systems keep active file blocks in memory to reduce disk accesses. Related studies have been focused on how to minimize buffer misses and the caused pe...
CODES
2008
IEEE
14 years 3 months ago
2008
IEEE
Application-specific system-on-chip platforms create the opportunity to customize the cache configuration for optimal performance with minimal chip estate. Simulation, in partic...
ISCA
2006
IEEE
14 years 2 months ago
2006
IEEE
Performance loss due to long-latency memory accesses can be reduced by servicing multiple memory accesses concurrently. The notion of generating and servicing long-latency cache m...
ICCD
2004
IEEE
14 years 5 months ago
2004
IEEE
This paper evaluates several hardware-based data prefetching techniques from an energy perspective, and explores their energy/performance tradeoffs. We present detailed simulation...
HPCA
1995
IEEE
14 years 8 days ago
1995
IEEE
As processor speeds increase relative to memory speeds, memory bandwidth is rapidly becoming the limiting performance factor for many applications. Several approaches to bridging ...