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DAC
1994
ACM
14 years 1 months ago
Statistical Delay Modeling in Logic Design and Synthesis
Manufacturing disturbances are inevitable in the fabrication of integrated circuits. These disturbances will result in variations in the delay speci cations of manufactured circui...
Horng-Fei Jyu, Sharad Malik
APNOMS
2006
Springer
14 years 21 days ago
An Architectural Framework for Network Convergence Through Application Level Presence Signaling
Over the past few years we have witnessed steady progress toward convergence in communications. We believe we are now witnessing nce beyond just media transport. Further, abstract ...
Atanu Mukherjee
DAC
2005
ACM
13 years 11 months ago
Variation-tolerant circuits: circuit solutions and techniques
Die-to-die and within-die variations impact the frequency and power of fabricated dies, affecting functionality, performance, and revenue. Variation-tolerant circuits and post-sil...
James Tschanz, Keith A. Bowman, Vivek De
NIPS
2000
13 years 10 months ago
A Silicon Primitive for Competitive Learning
Competitive learning is a technique for training classification and clustering networks. We have designed and fabricated an 11transistor primitive, that we term an automaximizing ...
David Hsu, Miguel Figueroa, Chris Diorio
ISMB
1996
13 years 10 months ago
A Grammar-Based Unification of Several Alignment and Folding Algorithms
Weshowin this paper that manypopular models of folding and/or alignment maybe described by a new formalism: multi-tape S-attribute grammars(MTSAG's).This formalism relieves t...
Fabrice Lefebvre