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ASAP
2007
IEEE
203views Hardware» more  ASAP 2007»
14 years 2 days ago
Reconfigurable Universal Adder
In this paper we present a novel adder/subtracter arithmetic unit that combines Binary and Binary Code Decimal (BCD) operations. The proposed unit uses effective addition/subtract...
Humberto Calderon, Georgi Gaydadjiev, Stamatis Vas...
GLVLSI
2007
IEEE
141views VLSI» more  GLVLSI 2007»
13 years 12 months ago
A synchronization algorithm for local temporal refinements in perfectly synchronous models with nested feedback loops
he abstract and simple computation and communication mechanism in the synchronous computational model it is easy to simulate synchronous systems and to apply formal verification m...
Tarvo Raudvere, Ingo Sander, Axel Jantsch
ICANN
2007
Springer
13 years 12 months ago
Topology Aware Internet Traffic Forecasting Using Neural Networks
Forecasting Internet traffic is receiving an increasing attention from the computer networks domain. Indeed, by improving this task efficient traffic engineering and anomaly detect...
Paulo Cortez, Miguel Rio, Pedro Sousa, Miguel Roch...
ASAP
2004
IEEE
126views Hardware» more  ASAP 2004»
13 years 12 months ago
Hyper-Programmable Architectures for Adaptable Networked Systems
We explain how modern programmable logic devices have capabilities that are well suited for them to assume a central role in the implementation of networked systems, now and in th...
Gordon J. Brebner, Philip James-Roxby, Eric Keller...
ATAL
2006
Springer
13 years 11 months ago
Multi-agent based peer-to-peer information retrieval systems with concurrent search sessions
In cooperative peer-to-peer information retrieval systems, each node can be considered an intelligent agent and these agents work collectively to provide an information retrieval ...
Haizheng Zhang, Victor R. Lesser
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