Parallel programs are difficult to write, test, and debug. This thesis explores how programmers build mental models about parallel programs, and demonstrates, through user evaluat...
Web sites are now considered an extension of the entire business, not just an additional channel or storefront or a simple information portal for the company. Creating an effectiv...
FPGA-based designs are more susceptible to single-event upsets (SEUs) compared to ASIC designs. Soft error rate (SER) estimation is a crucial step in the design of soft error tole...
Abstract--As an alternative to traditional life testing, degradation tests can be effective in assessing product reliability when measurements of degradation leading to failure can...
Suk Joo Bae, Seong-Joon Kim, Man Soo Kim, Bae Jin ...
This paper presents a new method for designing test wrappers for embedded cores with multiple clock domains. By exploiting the use of multiple shift frequencies, the proposed meth...