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JPDC
2000
141views more  JPDC 2000»
15 years 4 months ago
A System for Evaluating Performance and Cost of SIMD Array Designs
: SIMD arrays are likely to become increasingly important as coprocessors in domain specific systems as architects continue to leverage RAM technology in their design. The problem ...
Martin C. Herbordt, Jade Cravy, Renoy Sam, Owais K...
158
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JSA
2000
175views more  JSA 2000»
15 years 4 months ago
Complete worst-case execution time analysis of straight-line hard real-time programs
In this article, the problem of finding a tight estimate on the worst-case execution time (WCET) of a real-time program is addressed. The analysis is focused on straight-line code...
Friedhelm Stappert, Peter Altenbernd
JSS
2000
123views more  JSS 2000»
15 years 4 months ago
Approaches for broadcasting temporal data in mobile computing systems
Rapid advances in mobile communication technology have spawned many new mobile applications. A key element in many of these systems is the need to distribute real-time information...
Kam-yiu Lam, Edward Chan, Joe Chun-Hung Yuen
132
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JSS
2000
86views more  JSS 2000»
15 years 4 months ago
Quantitative analysis of static models of processes
The upstream activities of software development projects are often viewed as both the most important, the least understood, and hence the most problematic. This is particularly no...
Keith Phalp, Martin J. Shepperd
JUCS
2000
120views more  JUCS 2000»
15 years 4 months ago
Execution and Cache Performance of the Scheduled Dataflow Architecture
: This paper presents an evaluation of our Scheduled Dataflow (SDF) Processor. Recent focus in the field of new processor architectures is mainly on VLIW (e.g. IA-64), superscalar ...
Krishna M. Kavi, Joseph Arul, Roberto Giorgi
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