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VLSID
2008
IEEE
153views VLSI» more  VLSID 2008»
14 years 9 months ago
Total Power Minimization in Glitch-Free CMOS Circuits Considering Process Variation
Compared to subthreshold leakage, dynamic power is normally much less sensitive to the process variation due to its approximately linear relation to the process parameters. Howeve...
Yuanlin Lu, Vishwani D. Agrawal
IPCCC
2006
IEEE
14 years 3 months ago
Risk reduction based survivable WDM network design
— This paper presents an investment strategy to reduce the risk associated with failures in Wavelength Division Multiplexing (WDM) optical networks. The investment strategy deter...
K. Vajanapoom, David Tipper
CAV
2005
Springer
99views Hardware» more  CAV 2005»
14 years 2 months ago
Model Checking x86 Executables with CodeSurfer/x86 and WPDS++
This paper presents a toolset for model checking x86 executables. The members of the toolset are CodeSurfer/x86, WPDS++, and the Path Inspector. CodeSurfer/x86 is used to extract a...
Gogul Balakrishnan, Thomas W. Reps, Nicholas Kidd,...
ASPDAC
2007
ACM
117views Hardware» more  ASPDAC 2007»
14 years 1 months ago
Short-Circuit Compiler Transformation: Optimizing Conditional Blocks
Abstract-- We present the short-circuit code transformation technique, intended for embedded compilers. The transformation technique optimizes conditional blocks in high-level prog...
Mohammad Ali Ghodrat, Tony Givargis, Alex Nicolau
DBPL
1991
Springer
76views Database» more  DBPL 1991»
14 years 24 days ago
A Functional DBPL Revealing High Level Optimizations
We present a functional DBPL in the style of FP that facilitates the definition of precise semantics and opens up opportunities for far-reaching optimizations. The language is int...
Martin Erwig, Udo W. Lipeck