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179
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DATE
2009
IEEE
16 years 17 days ago
2009
IEEE
—Verification is a major issue in circuit and system design. Formal methods like bounded model checking (BMC) can guarantee a high quality of the verification. There are severa...
146
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DSD
2009
IEEE
16 years 17 days ago
2009
IEEE
— In this paper, we present a novel framework for the automated generation of Network-on-Chips (NoC) architectures, that enables architecture exploration and optimization. The au...
149
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HPDC
2009
IEEE
16 years 17 days ago
2009
IEEE
This paper presents the concept of pluggable parallelisation that allows scientists to develop “sequential like” codes that can take advantage of multi-core, cluster and grid ...
136
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ICC
2009
IEEE
16 years 17 days ago
2009
IEEE
Abstract—In this paper, we propose a simple and efficient twostage list synchronizer for frame synchronization of Low-Density Parity-Check (LDPC) coded data transmitted over the...
169
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ICDAR
2009
IEEE
16 years 17 days ago
2009
IEEE
An automated assembling of shredded/torn documents (2D) or broken pottery (3D) will support philologists, archaeologists and forensic experts. An automated solution for this task ...