15 search results - page 2 / 3 » Wire shaping of RLC interconnects |
ICCAD
2002
IEEE
14 years 5 months ago
2002
IEEE
In this paper, we present a novel wire duplication-based interconnect modeling technique. The proposed modeling technique exploits the sparsity of the L 1 matrix, where L is the ...
TCAD
2002
13 years 8 months ago
2002
This paper introduces an accurate analysis of on-chip inductance effects for distributed interconnects that takes the effect of both the series resistance and the output parasitic ...
ASPDAC
2001
ACM
14 years 5 days ago
2001
ACM
ICCAD
2002
IEEE
14 years 5 months ago
2002
IEEE
As the VLSI technology scaling down, the electromigration problem becomes one of the major concerns in high-performance IC design for both power network and signal interconnects. ...
ICCAD
2003
IEEE
14 years 5 months ago
2003
IEEE
Under modern VLSI technology, process variations greatly affect circuit performance, especially clock skew which is very timing sensitive. Unwanted skew due to process variation f...