564 search results - page 108 / 113 » Wireplanning in logic synthesis |
ENTCS
2008
13 years 7 months ago
2008
We present a type system extending the dependent type theory LF, whose terms are more amenable to compact representation. This is achieved by carefully omitting certain subterms w...
FMSD
2006
13 years 7 months ago
2006
Two base algorithms are known for reachability verification over timed automata. They are called forward and backwards, and traverse the automata edges using either successors or p...
IJAIT
2006
13 years 7 months ago
2006
We describe a system for the automated certification of safety properties of NASA software. The system uses Hoare-style program verification technology to generate proof obligatio...
TCAD
2008
13 years 7 months ago
2008
Detecting symmetries has many applications in logic synthesis that include, amongst other things, technology mapping, deciding equivalence of Boolean functions when the input corre...
FPGA
2007
ACM
14 years 1 months ago
2007
ACM
Boolean matching (BM) is a widely used technique in FPGA resynthesis and architecture evaluation. In this paper we present several improvements to the recently proposed SAT-based ...