564 search results - page 38 / 113 » Wireplanning in logic synthesis |
CSL
2009
Springer
14 years 3 months ago
2009
Springer
Abstract. For a two-variable formula B(X,Y) of Monadic Logic of Order (MLO) the Church Synthesis Problem concerns the existence and construction of a finite-state operator Y=F(X) ...
ENTCS
2007
13 years 8 months ago
2007
We propose to use a formal specification language as a high-level hardware description language. Formal languages allow for compact, unambiguous representations and yield designs...
DAC
2003
ACM
14 years 9 months ago
2003
ACM
Combinational circuits are generally thought of as acyclic structures. It is known that cyclic structures can be combinational, and techniques have been proposed to analyze cyclic...
DAC
1997
ACM
14 years 1 days ago
1997
ACM
We propose a methodology for applying gate-level logic transformations to optimize power in digital circuits. Statistically simulated[14] switching information, gate delays, signa...
DATE
2009
IEEE
14 years 3 months ago
2009
IEEE
—Intensive research is performed to find post-CMOS technologies. A very promising direction based on reversible logic are quantum computers. While in the domain of reversible lo...