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» Wireplanning in logic synthesis
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FPL
1999
Springer
147views Hardware» more  FPL 1999»
14 years 23 days ago
Synthia: Synthesis of Interacting Automata Targeting LUT-based FPGAs
This paper details the development, implementation, and results of Synthia, a system for the synthesis of Finite State Machines (FSMs) to field-programmable logic. Our approach us...
George A. Constantinides, Peter Y. K. Cheung, Wayn...
ISMVL
2008
IEEE
160views Hardware» more  ISMVL 2008»
14 years 2 months ago
Exact Synthesis of Elementary Quantum Gate Circuits for Reversible Functions with Don't Cares
Compact realizations of reversible logic functions are of interest in the design of quantum computers. In this paper we present an exact synthesis algorithm, based on Boolean Sati...
Daniel Große, Robert Wille, Gerhard W. Dueck...
EUROMICRO
1999
IEEE
14 years 24 days ago
Design Space Exploration in System Level Synthesis under Memory Constraints
This paper addresses the problem of component selection, task assignment and task scheduling for distributed embedded computer systems. Such systems have a large number of constra...
Radoslaw Szymanek, Krzysztof Kuchcinski
ICCAD
1996
IEEE
119views Hardware» more  ICCAD 1996»
14 years 19 days ago
An algorithm for synthesis of system-level interface circuits
We describe an algorithm for the synthesis and optimization of interface circuits for embedded system components such as microprocessors, memory ASIC, and network subsystems with ...
Ki-Seok Chung, Rajesh K. Gupta, C. L. Liu
ICCD
1992
IEEE
84views Hardware» more  ICCD 1992»
14 years 17 days ago
Synthesis of 3D Asynchronous State Machines
We describe a new synthesis procedure for designing asynchronous controllers from burst-mode specifications, a class of specifications allowing multiple input change fundamental m...
Kenneth Y. Yun, David L. Dill, Steven M. Nowick