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» Wireplanning in logic synthesis
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CASES
2006
ACM
13 years 11 months ago
State space reconfigurability: an implementation architecture for self modifying finite automata
Many embedded systems exhibit temporally and behaviorally disjoint behavior slices. When such behaviors are captured by state machines, the current design flow will capture it as ...
Ka-Ming Keung, Akhilesh Tyagi
ICCAD
1995
IEEE
88views Hardware» more  ICCAD 1995»
13 years 11 months ago
Estimation and bounding of energy consumption in burst-mode control circuits
This paper describes two techniques to quantify energy consumption of burst-modeasynchronous(clock-less)controlcircuits. The circuit specifications consideredare extended burst-m...
Peter A. Beerel, Kenneth Y. Yun, Steven M. Nowick,...
DESRIST
2009
Springer
115views Education» more  DESRIST 2009»
13 years 10 months ago
Ontological design
In this paper, we describe the concept of ontological design. We show how ontologies can be used as cognitive maps of complex, ill-structured, plastic problems. They can be used t...
Arkalgud Ramaprasad, Sridhar S. Papagari
ICCAD
2005
IEEE
87views Hardware» more  ICCAD 2005»
14 years 4 months ago
Statistical technology mapping for parametric yield
The increasing variability of process parameters leads to substantial parametric yield losses due to timing and leakage power constraints. Leakage power is especially affected by ...
Ashish Kumar Singh, Murari Mani, Michael Orshansky
EON
2008
13 years 8 months ago
Synthesizing the Mediator with jABC/ABC
Abstract. In this paper we show how to apply a tableau-based software composition technique to automatically generate the mediator's service logic. This uses an LTL planning (...
Tiziana Margaria