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» Wireplanning in logic synthesis
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HASE
1997
IEEE
13 years 11 months ago
Automated Computation of Decomposable Synchronization Conditions
: The most important aspect of concurrent and distributed computation is the interaction between system components. Integration of components into a system requires some synchroniz...
Gilberto Matos, James M. Purtilo, Elizabeth L. Whi...
DAC
2007
ACM
14 years 8 months ago
Global Critical Path: A Tool for System-Level Timing Analysis
An effective method for focusing optimization effort on the most important parts of a design is to examine those elements on the critical path. Traditionally, the critical path is...
Girish Venkataramani, Mihai Budiu, Tiberiu Chelcea...
DAC
2000
ACM
14 years 8 months ago
Hardware implementation of communication protocols modeled by concurrent EFSMs with multi-way synchronization
In this paper, we propose a technique to implement communication protocols as hardware circuits using a model of concurrent EFSMs with multi-way synchronization. Since use of mult...
Hisaaki Katagiri, Keiichi Yasumoto, Akira Kitajima...
DAC
2003
ACM
14 years 8 months ago
Clock-tree power optimization based on RTL clock-gating
As power consumption of the clock tree in modern VLSI designs tends to dominate, measures must be taken to keep it under control. This paper introduces an approach for reducing cl...
Monica Donno, Alessandro Ivaldi, Luca Benini, Enri...
DAC
2003
ACM
14 years 8 months ago
Making cyclic circuits acyclic
Cyclic circuits that do not hold state or oscillate are often the most convenient representation for certain functions, such as arbiters, and can easily be produced inadvertently ...
Stephen A. Edwards