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» Wireplanning in logic synthesis
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ICCAD
1999
IEEE
96views Hardware» more  ICCAD 1999»
13 years 11 months ago
Implication graph based domino logic synthesis
In this paper, we present a new approach to the problem of inverter elimination in domino logic synthesis. A small piece of static CMOS logic is introduced to the circuit to avoid...
Ki-Wook Kim, C. L. Liu, Sung-Mo Kang
DATE
2004
IEEE
123views Hardware» more  DATE 2004»
13 years 11 months ago
Synthesis and Optimization of Threshold Logic Networks with Application to Nanotechnologies
We propose an algorithm for efficient threshold network synthesis of arbitrary multi-output Boolean functions. The main purpose of this work is to bridge the wide gap that currentl...
Rui Zhang, Pallav Gupta, Lin Zhong, Niraj K. Jha
ISVLSI
2007
IEEE
107views VLSI» more  ISVLSI 2007»
14 years 1 months ago
A Hash-based Approach for Functional Regularity Extraction During Logic Synthesis
Performance, power, and functionality, yield and manufacturability are rapidly becoming additional critical factors that must be considered at higher levels of ion. A possible sol...
Angelo P. E. Rosiello, Fabrizio Ferrandi, Davide P...
CAV
2010
Springer
227views Hardware» more  CAV 2010»
13 years 5 months ago
Breach, A Toolbox for Verification and Parameter Synthesis of Hybrid Systems
We describe Breach, a Matlab toolbox providing a coherent set of simulation-based techniques aimed at the analysis of deterministic models of hybrid dynamical systems. The primary ...
Alexandre Donzé
AI
2010
Springer
13 years 2 months ago
Annotation Concept Synthesis and Enrichment Analysis
Annotation Enrichment Analysis (AEA) is a widely used analytical approach to process data generated by high-throughput genomic and proteomic experiments such as gene expression mic...
Mikhail Jiline, Stan Matwin, Marcel Turcotte