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GLVLSI
2000
IEEE
85views VLSI» more  GLVLSI 2000»
14 years 23 hour ago
Fast and accurate estimation of floorplans in logic/high-level synthesis
In many applications such as high-level synthesis (HLS) and logic synthesis and possibly engineering change order (ECO) we would like to get fast and accurate estimations of diffe...
Kia Bazargan, Abhishek Ranjan, Majid Sarrafzadeh
DATE
2007
IEEE
97views Hardware» more  DATE 2007»
14 years 1 months ago
Systematic comparison between the asynchronous and the multi-synchronous implementations of a network on chip architecture
In this paper we present a systematic comparison between two different implementations of a distributed Network on Chip: fully asynchronous and multi-synchronous. The NoC architec...
Abbas Sheibanyrad, Ivan Miro Panades, Alain Greine...
DATE
2006
IEEE
103views Hardware» more  DATE 2006»
14 years 1 months ago
Novel designs for thermally robust coplanar crossing in QCA
In this paper, different circuit arrangements of Quantumdot Cellular Automata (QCA) are proposed for the so-called coplanar crossing. These arrangements exploit the majority votin...
Sanjukta Bhanja, Marco Ottavi, Fabrizio Lombardi, ...
DFT
2005
IEEE
81views VLSI» more  DFT 2005»
14 years 1 months ago
Modeling QCA Defects at Molecular-level in Combinational Circuits
This paper analyzes the deposition defects in devices and circuits made of Quantum-dot Cellular Automata (QCA) for molecular implementation. Differently from metal-based QCA, in ...
Mariam Momenzadeh, Marco Ottavi, Fabrizio Lombardi
SPAA
2004
ACM
14 years 1 months ago
Online algorithms for network design
This paper presents the first polylogarithmic-competitive online algorithms for two-metric network design problems. These problems arise naturally in the design of computer netwo...
Adam Meyerson