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IEEEPACT
2007
IEEE
14 years 2 months ago
Architectural Support for the Stream Execution Model on General-Purpose Processors
There has recently been much interest in stream processing, both in industry (e.g., Cell, NVIDIA G80, ATI R580) and academia (e.g., Stanford Merrimac, MIT RAW), with stream progra...
Jayanth Gummaraju, Mattan Erez, Joel Coburn, Mende...
DAC
2006
ACM
14 years 1 months ago
Signature-based workload estimation for mobile 3D graphics
Until recently, most 3D graphics applications had been regarded as too computationally intensive for devices other than desktop computers and gaming consoles. This notion is rapid...
Bren Mochocki, Kanishka Lahiri, Srihari Cadambi, X...
ISCA
2000
IEEE
103views Hardware» more  ISCA 2000»
14 years 10 days ago
Piranha: a scalable architecture based on single-chip multiprocessing
The microprocessor industry is currently struggling with higher development costs and longer design times that arise from exceedingly complex processors that are pushing the limit...
Luiz André Barroso, Kourosh Gharachorloo, R...
CAV
1998
Springer
175views Hardware» more  CAV 1998»
14 years 6 days ago
An ACL2 Proof of Write Invalidate Cache Coherence
As a pedagogical exercise in ACL2, we formalize and prove the correctness of a write invalidate cache scheme. In our formalization, an arbitrary number of processors, each with its...
J. Strother Moore
PR
2008
228views more  PR 2008»
13 years 8 months ago
Accurate integration of multi-view range images using k-means clustering
3D modelling finds a wide range of applications in industry. However, due to the presence of surface scanning noise, accumulative registration errors, and improper data fusion, re...
Hong Zhou, Yonghuai Liu