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2003
IEEE
145views Hardware» more  DATE 2003»
14 years 3 months ago
Optimal Reconfiguration Functions for Column or Data-bit Built-In Self-Repair
In modern SoCs, embedded memories occupy the largest part of the chip area and include an even larger amount of active devices. As memories are designed very tightly to the limits...
Michael Nicolaidis, Nadir Achouri, Slimane Boutobz...
SOSP
1997
ACM
13 years 11 months ago
Free Transactions With Rio Vista
Abstract: Transactions and recoverable memories are powerful mechanisms for handling failures and manipulating persistent data. Unfortunately, standard recoverable memories incur a...
David E. Lowell, Peter M. Chen
PPOPP
2010
ACM
14 years 7 months ago
Modeling transactional memory workload performance
Transactional memory promises to make parallel programming easier than with fine-grained locking, while performing just as well. This performance claim is not always borne out bec...
Donald E. Porter, Emmett Witchel
CGO
2005
IEEE
14 years 3 months ago
Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache
Modern embedded microprocessors use low power on-chip memories called scratch-pad memories to store frequently executed instructions and data. Unlike traditional caches, scratch-p...
Rajiv A. Ravindran, Pracheeti D. Nagarkar, Ganesh ...
PVLDB
2008
96views more  PVLDB 2008»
13 years 9 months ago
H-store: a high-performance, distributed main memory transaction processing system
Our previous work has shown that architectural and application shifts have resulted in modern OLTP databases increasingly falling short of optimal performance [10]. In particular,...
Robert Kallman, Hideaki Kimura, Jonathan Natkins, ...