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» Worst-Case Optimal Tree Layout in a Memory Hierarchy
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199
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ICCAD
2003
IEEE
99views Hardware» more  ICCAD 2003»
16 years 20 days ago
A Probabilistic Approach to Buffer Insertion
This work presents a formal probabilistic approach for solving optimization problems in design automation. Prediction accuracy is very low especially at high levels of design flo...
Vishal Khandelwal, Azadeh Davoodi, Akash Nanavati,...
229
Voted
COMPGEOM
2006
ACM
15 years 11 months ago
I/O-efficient batched union-find and its applications to terrain analysis
Despite extensive study over the last four decades and numerous applications, no I/O-efficient algorithm is known for the union-find problem. In this paper we present an I/O-effic...
Pankaj K. Agarwal, Lars Arge, Ke Yi
215
Voted
GLOBECOM
2009
IEEE
15 years 11 months ago
Energy-Efficient Multi-Pipeline Architecture for Terabit Packet Classification
Energy efficiency has become a critical concern in designing high speed packet classification engines for next generation routers. Although TCAM-based solutions can provide high th...
Weirong Jiang, Viktor K. Prasanna
ICS
2001
Tsinghua U.
15 years 12 months ago
Tools for application-oriented performance tuning
Application performance tuning is a complex process that requires assembling various types of information and correlating it with source code to pinpoint the causes of performance...
John M. Mellor-Crummey, Robert J. Fowler, David B....
220
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TJS
2002
121views more  TJS 2002»
15 years 7 months ago
Precise Data Locality Optimization of Nested Loops
A significant source for enhancing application performance and for reducing power consumption in embedded processor applications is to improve the usage of the memory hierarchy. In...
Vincent Loechner, Benoît Meister, Philippe C...