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MICRO
2000
IEEE
72views Hardware» more  MICRO 2000»
13 years 8 months ago
PipeRench implementation of the instruction path coprocessor
This paper demonstrates how an Instruction Path Coprocessor (I-COP) can be efficiently implemented using the PipeRench reconfigurable architecture. An I-COP is a programmable on-c...
Yuan C. Chou, Pazhani Pillai, Herman Schmit, John ...
FCCM
1997
IEEE
106views VLSI» more  FCCM 1997»
13 years 12 months ago
Fault simulation on reconfigurable hardware
In this paper we introduce a new approach to fault simulation, using reconfigurable hardware to implement a critical path tracing algorithm. Our performance estimate shows that ou...
Miron Abramovici, Premachandran R. Menon
DATE
2004
IEEE
139views Hardware» more  DATE 2004»
14 years 4 days ago
Efficient Implementations of Mobile Video Computations on Domain-Specific Reconfigurable Arrays
Mobile video processing as defined in standards like MPEG-4 and H.263 contains a number of timeconsuming computations that cannot be efficiently executed on current hardware archi...
Sami Khawam, Sajid Baloch, Arjun Pai, Imran Ahmed,...
FPL
2006
Springer
111views Hardware» more  FPL 2006»
14 years 2 days ago
A Simulation Platform for Reconfigurable Computing Research
In this paper, we present a full-system reconfigurable computing simulation platform intended to promote innovative new research in reconfigurable computing. Currently, reconfigur...
Wenyin Fu, Katherine Compton
ARC
2006
Springer
201views Hardware» more  ARC 2006»
14 years 5 days ago
Dynamic Partial Reconfigurable FIR Filter Design
Abstract. This paper presents a novel partially reconfigurable FIR filter design that employs dynamic partial reconfiguration. Our scope is to implement a low-power, area-efficient...
Yeong-Jae Oh, Hanho Lee, Chong Ho Lee