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» XTR Implementation on Reconfigurable Hardware
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ERSA
2004
130views Hardware» more  ERSA 2004»
13 years 9 months ago
Computing Lennard-Jones Potentials and Forces with Reconfigurable Hardware
Abstract-- Technological advances have made FPGAs an attractive platform for the acceleration of complex scientific applications. These applications demand high performance and hig...
Ronald Scrofano, Viktor K. Prasanna
SIGARCH
2008
152views more  SIGARCH 2008»
13 years 8 months ago
OpenDF: a dataflow toolset for reconfigurable hardware and multicore systems
This paper presents the OpenDF framework and recalls that dataflow programming was once invented to address the problem of parallel computing. We discuss the problems with an impe...
Shuvra S. Bhattacharyya, Gordon J. Brebner, Jö...
DFT
2006
IEEE
203views VLSI» more  DFT 2006»
14 years 2 months ago
Self Testing SoC with Reduced Memory Requirements and Minimized Hardware Overhead
This paper describes a methodology of creating a built-in diagnostic system of a System on Chip and experimental results of the system application on the AT94K FPSLIC with cores d...
Ondrej Novák, Zdenek Plíva, Jiri Jen...
FPL
2006
Springer
140views Hardware» more  FPL 2006»
14 years 3 days ago
A Thermal Management and Profiling Method for Reconfigurable Hardware Applications
Given large circuit sizes, high clock frequencies, and possibly extreme operating environments, Field Programmable Gate Arrays (FPGAs) are capable of heating beyond their designed...
Phillip H. Jones, John W. Lockwood, Young H. Cho
FPL
2006
Springer
80views Hardware» more  FPL 2006»
14 years 3 days ago
A Compiler Intermediate Representation for Reconfigurable Fabrics
An intermediate representation (IR) is a central structure around which tools such as compilers and synthesis tools are built. In this paper we propose such an IR specifically des...
Zhi Guo, Walid A. Najjar