Sciweavers

399 search results - page 39 / 80
» XTR Implementation on Reconfigurable Hardware
Sort
View
IPPS
2006
IEEE
14 years 2 months ago
Dedicated module access in dynamically reconfigurable systems
Modern FPGAs, such as the Xilinx Virtex-II Series, offer the feature of partial and dynamic reconfiguration, allowing to load various hardware configurations (i.e., HW modules) du...
Jens Hagemeyer, Boris Kettelhoit, Mario Porrmann
ASPDAC
2001
ACM
120views Hardware» more  ASPDAC 2001»
14 years 4 days ago
Virtual Java/FPGA interface for networked reconfiguration
Abstract- Avirtual interfacebetweenJava andFPGA for networked reconfigurationis presented. ThroughtheJavaflFPGAinterface,Java applicationscan exploithardwareaccelerators with FPGAs...
Yajun Ha, Geert Vanmeerbeeck, Patrick Schaumont, S...
IPPS
2007
IEEE
14 years 2 months ago
A Study of Design Efficiency with a High-Level Language for FPGAs
Over the years reconfigurable computing devices such as FPGAs have evolved from gate-level glue logic to complex reprogrammable processing architectures. However, the tools used f...
Zain-ul-Abdin, Bertil Svensson
ICCD
2006
IEEE
117views Hardware» more  ICCD 2006»
14 years 5 months ago
System-Level Energy Modeling for Heterogeneous Reconfigurable Chip Multiprocessors
—Field-Programmable Gate Array (FPGA) technology is characterized by continuous improvements that provide new opportunities in system design. Multiprocessors-ona-Programmable-Chi...
Xiaofang Wang, Sotirios G. Ziavras
ARC
2007
Springer
140views Hardware» more  ARC 2007»
14 years 15 days ago
Reconfigurable Computing for Accelerating Protein Folding Simulations
Abstract. This paper presents a methodology for the design of a reconfigurable computing system applied to a complex problem in molecular Biology: the protein folding problem. An e...
Nilton B. Armstrong, Heitor S. Lopes, Carlos R. Er...