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» XTR Implementation on Reconfigurable Hardware
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CODES
2006
IEEE
14 years 1 months ago
A unified hardware/software runtime environment for FPGA-based reconfigurable computers using BORPH
This paper presents a hw/sw codesign methodology based on BORPH, an operating system designed for FPGA-based reconfigurable computers (RC's). By providing native kernel suppo...
Hayden Kwok-Hay So, Artem Tkachenko, Robert W. Bro...
AHS
2007
IEEE
252views Hardware» more  AHS 2007»
14 years 4 months ago
A Hybrid Engine for the Placement of Domain-Specific Reconfigurable Arrays
Rapid-prototyping of commercial devices and the demanding requirements for flexible hardware in mobile applications have driven the raise of reconfigurable hardware. The adaptatio...
Wing On Fung, Tughrul Arslan, Sami Khawam
FPGA
2010
ACM
197views FPGA» more  FPGA 2010»
14 years 1 months ago
A 3d-audio reconfigurable processor
Various multimedia communication systems based on 3DAudio algorithms have been proposed by researchers from the acoustic data processing domain. However, all systems reported in t...
Dimitris Theodoropoulos, Georgi Kuzmanov, Georgi G...
MAM
2006
95views more  MAM 2006»
13 years 9 months ago
Stochastic spatial routing for reconfigurable networks
FPGA placement and routing is time consuming, often serving as the major obstacle inhibiting a fast edit-compile-test loop in prototyping and development and the major obstacle pr...
André DeHon, Randy Huang, John Wawrzynek
CODES
2007
IEEE
14 years 1 months ago
Energy efficient co-scheduling in dynamically reconfigurable systems
Energy consumption is a major issue in dynamically reconfigurable systems because of the high power requirements during repeated configurations. Hardware designs employ low power ...
Pao-Ann Hsiung, Pin-Hsien Lu, Chih-Wen Liu