Sciweavers

17 search results - page 3 / 4
» Yield Improvement, Fault-Tolerance to the Rescue
Sort
View
DAC
2009
ACM
14 years 8 months ago
Decoding nanowire arrays fabricated with the multi-spacer patterning technique
Silicon nanowires are a promising solution to address the increasing challenges of fabrication and design at the future nodes of the Complementary Metal-Oxide-Semiconductor (CMOS)...
M. Haykel Ben Jamaa, Yusuf Leblebici, Giovanni De ...
MICRO
2009
IEEE
178views Hardware» more  MICRO 2009»
14 years 2 months ago
Improving cache lifetime reliability at ultra-low voltages
Voltage scaling is one of the most effective mechanisms to reduce microprocessor power consumption. However, the increased severity of manufacturing-induced parameter variations a...
Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerso...
ICCAD
2005
IEEE
97views Hardware» more  ICCAD 2005»
14 years 4 months ago
DiCER: distributed and cost-effective redundancy for variation tolerance
— Increasingly prominent variational effects impose imminent threat to the progress of VLSI technology. This work explores redundancy, which is a well-known fault tolerance techn...
Di Wu, Ganesh Venkataraman, Jiang Hu, Quiyang Li, ...
LCN
2008
IEEE
14 years 1 months ago
Constructing low-latency overlay networks: Tree vs. mesh algorithms
Abstract—Distributed interactive applications may have stringent latency requirements and dynamic user groups. These applications may benefit from a group communication system, ...
Knut-Helge Vik, Carsten Griwodz, Pål Halvors...
ISCI
2008
66views more  ISCI 2008»
13 years 7 months ago
An energy-efficient real-time scheduling scheme on dual-channel networks
The recent evolution of wireless sensor networks have yielded a demand to improve energy-efficient scheduling algorithms and energy-efficient medium access protocols. This paper p...
Mikyung Kang, Dong-In Kang, Jinwoo Suh, Junghoon L...